/******************************************************************************
 *
 *                      VIPER
 *
 * This module contains the constants which define the VIPER board.
 *
 * NOTE: It should not contain definition of any variables, since it is 
 *       included by the drivers too!
 *
 * History:
 *   +----------+------------+------------------------------------------------+
 *   |   Date   |     by     |     Description                                |
 *   +----------+------------+------------------------------------------------+
 *   |          | Lior	     | Written                                        |
 *   +----------+------------+------------------------------------------------+
 *
 *****************************************************************************/

/*-----------------------------------------------------------------------------
 * 
 *  The following definition are used in CMON.
 *  They MUST apear in any board definition file.
 *
 *---------------------------------------------------------------------------*/

#define CPU_TYPE NS32FX164
#define FPU_TYPE NOFPU
#define BUSWIDTH     2           /* bytes */
#define MON_NAME "CMONFX164"
#define VERSION  "4"
#define REVISION "4"
#define BOARD VIPER

#define TRANSPARENT	FALSE


/*-----------------------------------------------------------------------------
 * DSPM
 *---------------------------------------------------------------------------*/
#define DSPM_RAM_BASE	    0xfffe0000
#define DSPM_RAM_SIZE	    0x1000

#define CLPTR_REG_ADDR	    0xffff8020
#define CLPTR_REG	*((unsigned short *) CLPTR_REG_ADDR)

#define NMISTAT_REG_ADDR    0xffff9014
#define NMISTAT_REG	*((unsigned short *) NMISTAT_REG_ADDR)

/*-----------------------------------------------------------------------------
 *	SYSTEM CHIP	FX200
 *   DRAM controller   4 DMA channels    16 input ICU 	 UART 
 *---------------------------------------------------------------------------*/
/*
 * Bus & Memory Controller
 */
#define	MCFG_ADD	0xfe0A00  /* Chip configuration register */
#define	BMCFG_ADD	0xfe0910  /* BMC configuration register */
#define MWAIT_ADD	0xfe0912  /* Memory Wait state register */

/*
 * Timer
 */
#define TCU_ADDR        0xfe0400    	/* Timer control unit address 	*/
#define CSCL_ADD	(0xfe0401)	/* Clock scale control		*/
#define TIMER_ADD	0xfe0402	/* One-shot timer		*/
#define MCLON_ADD	0xfe040C	/* Master clock high-time	*/
#define MCLOFF_ADD	0xfe040E	/* Master clock low-time	*/
#define RFRT_ADDR	(0xfe0506)	/* Dram refresh rate		*/
#define RFEN_ADDR	(0xfe0505)	/* Dram refresh enable		*/
#define REFRESH_VAL	0x37		 /* #define REFRESH_VAL	0x3 */


/*
 * Icu
 */
#define ICU_TYPE 	FX200ICU
#define ICU_ADDR	0xFFFE00


/* Uart.
 * FX200 uart is the default uart used by the monitor. 
 * Optional uart is an IBM PC uart card compatible to the NS16550 uart.
 * To sellect PC UART change UART_TYPE definition from FX200UART to NS16550.
 */
#ifndef UART_TYPE
#	define UART_TYPE	FX200UART 
#endif

#if (UART_TYPE == FX200UART)
#	define SERIAL_FILE	"fx200.h"
#	define UART_0_ADDR	0xfe0600
#endif
#if (UART_TYPE == NS16550)	/* INS8250 , NS16550 compatible */
#	define SERIAL_FILE	"ns16550.h"
#	define UART_0_ADDR	0xE005F0
#	define ONE_UART 		/* UART_1_ADDR	0xE007F0 */
#	define UART_BUS_OFFSET 2
#	define NO_UART_INT
#endif


/*-----------------------------------------------------------------------------
 * 
 * On Board Peripherals & I/O
 *
 *---------------------------------------------------------------------------*/
/*
 *	DRAM
 */
#define DRAM_START 0x0

/*
 *	SRAM
 */
#define LAST_ELEMENT	0x969696
#define SRAM_START      0xc00000 
#define SRAM_START1      0xc04000 
#define SRAM_START2      LAST_ELEMENT 
#define SRAM_START3      LAST_ELEMENT 

/*
 *      EPROM
 *	eprom`s type can be 512K, 1M or 2M. 
 */
#define ROM_START 0x800000  /* Begin address of rom */
#define ROM_SIZE  0x20000     /* For 128 EPROMs      */
#define ROM_BUSWIDTH 2

/*
 *      LAN
 */
#define LAN_IOBASE  0xe00600
#define MAXRETRY    40000          /* Max retries for packet reception */
#define LAN_BUS_OFFSET	2



/*-----------------------------------------------------------------------------
 * 
 * On Board  I/O  Registers
 *
 *---------------------------------------------------------------------------*/

/*
 *  LCD control/data Register,  Write Only 
 */

#define LCDDWR_ADD        0xE81100
#define LCDIR_ADD        0xE83100
#define LCDDWR     *((volatile unsigned short *) LCDDWR_ADD)
#define LCDIR     *((volatile unsigned short *) LCDIR_ADD)






/*----------------------------------------------------------------------------
 * C macroes
 *--------------------------------------------------------------------------*/

/*
 * Dip Switch Usage:
 * Usage of dip switch for burned monitor according to the monitor manual.
 * Note that, When a dip switch is OFF this bit is set.
 * 
 *
 *  dip switch bits are defined as follows:
 *  bit1/2/3 : Communication mode
 *
 *	  S3    S2    S1
 *	  -----------------------------------
 *	  ON    ON    ON    Thick Ethernet
 *	  ON	ON    OFF   Thin Ethernet
 *	  ON	OFF   ON    38400
 *        ON	OFF   OFF   19200
 *	  OFF	ON    ON    9600
 *	  OFF   ON    OFF   4800
 *        OFF   OFF   ON    2400
 *	  OFF   OFF   OFF   1200
 *
 *  bit4: OFF -> Jump to Demo
 *        ON  -> Jump to monitor
 */

#define DIP_SWITCH_ADD    0xE00001
#define DIP_SWITCH        (*((volatile byte *) DIP_SWITCH_ADD))

#ifndef DEBUG
#	define BOARD_COM_MODE  ((DIP_SWITCH & 0x7) > 1   ?   RS232 :	LAN) 
#	define ETHERNET_TYPE	(NOT (DIP_SWITCH & 0x1))
#   	define UART_DIVISOR uart_table[ \
			    ((unsigned int) DIP_SWITCH) & 0x7].divisor
#else
#	define BOARD_COM_MODE (DIP_SWITCH & 0x8   ?   LAN     :       RS232)
#	define ETHERNET_TYPE 1
#	define UART_DIVISOR BAUD_9600
#endif

/*
 *  Baud rate conversion table.  Setting of the DIP switch serves
 *  as index into table.  Table holds value to be loaded into
 *  divisor latches.  
 *  For FX200 UART:	UART master clock CTTL = 19.6608 MHz.
 *  divisor value (UBRG) = (CTTL / (buad_rate * 16)) - 1
 *
 *  For IBM-PC UART:	UART master clock = 1.8432 MHz.
 *  divisor value (DLL/DLM) = (clock / (buad_rate * 16))
 */
#if (UART_TYPE == FX200UART)
#   	define UART_INIT_TABLE const uart_table_entry uart_table[] = \
			{ {9600,    127}\
			, {9600,    127}\
			, {38400,   31}\
			, {19200,   63}\
			, {9600,    127}\
			, {4800,    255}\
			, {2400,    511}\
			, {1200,    1023}\
	 		, {0, 0} };
#   	define BAUD_9600	127
#else
#   	define UART_INIT_TABLE const uart_table_entry uart_table[] = \
			{ {9600,    12}\
			, {9600,    12}\
			, {19200,   6}\
			, {19200,   6}\
			, {9600,    12}\
			, {4800,    24}\
			, {2400,    48}\
			, {1200,    96}\
	 		, {0, 0} };
#   	define BAUD_9600	12
#endif

#ifndef DEBUG
#   	define DEMO_ON          BIT_ON(3, DIP_SWITCH)
#else
#   	define DEMO_ON	    0
#endif
#define DEMO_ADDR        0x810000






/*-----------------------------------------------------------------------------
 *  Assembly macroes
 *---------------------------------------------------------------------------*/


#ifdef ASEM
.macro TURN_OFF_SHADOW
#if (ROM_START == 0x0)
	movb    $(0x02), @BMCFG_ADD   # Dram 1024 columns, ROM at low add.
#else
	movb	$(0x06), @BMCFG_ADD   # Dram 1024 columns, Dram at low add. 
#endif
	movw	$(0x0666), @MWAIT_ADD # ROM/SRAM/DRAM : 1 Wait State 
				      # IO		: 14 Wait States 

	movd	$0x0, r0
    refsh0: 
	movb 	$(REFRESH_VAL), @RFRT_ADDR	# Write refresh Value

	addd	$0x1, r0
	movd	r0, r1				# Variable Delay Loop
    refsh1:	acbd $-1, r1, refsh1

	cmpb 	$(REFRESH_VAL),  @RFRT_ADDR	# Check refresh Value
	bne	refsh0
	movb    $(0x40), @RFEN_ADDR		# Enable Refresh

	movb	$(0x0), @CSCL_ADD			# Set fast CCKL

	movd    $0x100000, r0         		# Wait after reset
    delay0: 	acbd $-1,  r0, delay0
.endm
#endif /* ASEM */

#define JMP_TO_DIAGNOS	bne _start_pu__




/*-----------------------------------------------------------------------------
 * Diagnostic macros and definitions 
 *  This part is  ifdefed DIAG 
 *---------------------------------------------------------------------------*/
#ifdef DIAG

#ifdef DIAG_MAIN
extern  char *test_cpu__(), *test_dram__(),  *test_sram__(),
#if (UART_TYPE == FX200UART)
	     *test_fx200uart__(),
#else		/* NS16550 */
	     *test_16550__(),
#endif
	     *test_icu__(), *test_eprom__(), 
	     *test_led__(), *test_lcd__();

const struct diag_desc diag_test_list__[] = {
			{" CPU TEST",   	test_cpu__,	TRUE},  
			{" DRAM TEST",   	test_dram__,	TRUE}, 
			{" SRAM TEST",   	test_sram__,	TRUE}, 
#if (UART_TYPE == FX200UART)
			{" SERIAL I/O TEST",   test_fx200uart__,TRUE},
#else		/* NS16550 */
			{" SERIAL I/O TEST",   test_16550__,	TRUE},
#endif
			{" ICU TEST",   	test_icu__,	TRUE},  
			{" EPROM TEST",  	test_eprom__,	TRUE}, 
			{" LED TEST",  	test_led__,		FALSE}, 
			{" LCD TEST",  	test_lcd__,		FALSE}, 
			{0,  0, 0}
			};


/*
 * Board intialization and interface  macros.
 */
#endif
#	define INIT_SHADOW  {shadow.lcr = 0;}
#endif



/*----------------------------------------------------------------------------
 *  LCD Macros
 *---------------------------------------------------------------------------*/
#define LCD0    0x01
#define LCD1    0x02
#define LCD2    0x04
#define LCD3    0x08

#define SET_LCD_CMND(nibble) { LCDIR = ((nibble) << 8) & 0x0f00; }
#define SET_LCD_DATA(nibble) { LCDDWR = ((nibble) << 8) & 0x0f00; }
#define INIT_LCD 	init_lcd__()
#define PRINT_LCD(str)	print_lcd__(str)
#define LCD_RAM_DELAY	50000
#define LCD_ROM_DELAY	20000


/*----------------------------------------------------------------------------
 *  LED Macros
 *---------------------------------------------------------------------------*/
#define   LED_PORT_ADD  0xe88101
#define   LED_PORT  (*((volatile byte *) LED_PORT_ADD))
#ifdef ASEM
#	define LED(X)	    movb	$(X), @LED_PORT_ADD
#else
#	define LED(X)      LED_PORT = (X)
#endif

#define	LED_0	0x7	/*	0	*/
#define	LED_1	0x6	/*	1	*/
#define	LED_2	0x5	/*	2	*/
#define	LED_3	0x4	/*	3	*/
#define	LED_4	0x3	/*	4	*/
#define	LED_5	0x2	/*	5	*/
#define	LED_6	0x1	/*	6	*/
#define	LED_7	0x0	/*	7	*/
#define	LED_8	0x6	/*  not used	*/
#define	LED_9	0x5     /*  not used    */
#define	LED_A	0x3     /*  not used    */
#define	LED_B	0x6     /*  not used    */
#define	LED_C	0x5     /*  not used    */
#define	LED_D	0x3     /*  not used    */
#define	LED_E	0x6     /*  not used    */
#define	LED_F	0x7     /*  all off     */
#define	LED_P	0x0     /*  all on      */

