
MEMORY {
        diag_ram_mem : origin=0x410, length = 0x3f0
        rom_mem : origin=0x400000, length = 0x8000
}       

SECTIONS {
        .data INTO(diag_ram_mem) : { *(.data) *(.static) }
        .bss BIND(NEXT(4)) : { *(.bss) }
        .text INTO(rom_mem) : { *(.text) *(.link) }
}


_START_DATA__ = addr(.data);
_END_DATA__ = addr(.data) + sizeof(.data);
_START_BSS__ = addr(.bss);
_END_BSS__ = addr(.bss) + sizeof(.bss);
_START_TXT__ = addr(.text);
_END_TXT__ = addr(.text) + sizeof(.text);

